1. Field of the Invention
The invention relates to a substrate strip used for chip package, and particularly, to a multi-row substrate strip and a method for manufacturing the same.
2. Description of the Related Art
The conventional substrate strip comprises a plurality of substrate units. In the semi-conductor package technology, a plurality of chips are disposed on these substrate units, and undergo the steps of appropriate wire bonding process for electrical connection, and molding process to seal the chips with a molding compound; and finally these substrate units are cut and separated to form a plurality of semi-conductor package structures.
With reference to FIGS. 1 and 2, a conventional substrate strip 100 comprises a plurality of substrate units 110 in a single row each having a surface 111, and a plurality of connecting bars 120 between adjacent substrate units 110, wherein at lease one corner 112 of each of the substrate units 110 is connected to the connecting bars 120. A metal layer 130 is formed on the surfaces 111 of the substrate strip 100; a solder mask 140 is formed on the substrate strip 100 to expose the metal layer 130; a plating layer 150 may be formed on the metal layer 130 by means of plating or others. The metal layer 130 comprises a plurality of runner portions 131 and a plurality of gate portions 132, wherein the runner portions 131 are formed on the connecting bars 120, and the gate portions 132 are formed at the corners 112 of the substrate units 110. The plating layer 150 allows the remainder material of a molding compound (not shown) to be de-gated easily after the molding process, without damaging a plurality of traces 113 of the substrate units 110 or the molding compound of the sealed chip.
After the processes of die mounting and electrically connecting are completed, during the molding process, the molding compound can be injected into a cavity (not shown) of a molding tool along the runner portions 131 and the gate portions 132 of the metal layer 130, so as to seal the chip. Subsequently, the degating operation is proceeded to de-gate the remainder material of the molding compound on the runner portions 131 and the gate portions 132. Then the substrate strip 100 is cut and separated into a plurality of package structures along the plurality of slots 101, while the connecting bars 120 and other remainder frames are discarded.
In order to increase the number of the substrate units, a plurality of substrate units of a conventional substrate strip are designed to be arranged in double (multiple) rows. For example, U.S. Pat. No. 6,580,620 discloses a printed circuit board with a matrix configuration comprising a plurality of printed circuit board units arranged in matrix, i.e., in double (multiple) rows. The corner of each of the printed circuit board units is connected with a first mold runner gate or a second mold runner gate. The first mold runner gates and the corresponding second mold runner gates are connected by a plurality of integrated mold runners, which are located between the printed circuit board units in the first row. A plating process is conducted to apply a plating material to the first mold runner gates and the second mold runner gates and the integrated mold runners. However, after the package process has been finished and individual packages have been cut and separated, the plating material on the integrated mold runners will be discarded together with the remainder frames, leading to a waste of plating material.
Consequently, there is an existing need for a multi-row substrate strip and a method for manufacturing the same to solve the above-mentioned problems.